Signal correction device, image reading device, image processing apparatus, signal correction method, and computer program product

ABSTRACT

A signal correction device includes a correction signal generator configured to generate a correction signal serving to remove noise superimposed on an input signal; a phase adjuster configured to shift a phase of the correction signal generated by the correction signal generator; a subtractor configured to generate an output signal for output by subtracting the correction signal from the input signal; a peak and bottom detector configured to detect a peak value and a bottom value of the output signal; and a determiner configured to determine a phase-shift amount of the phase adjuster from the peak value and the bottom value of the output signal detected by the peak and bottom detector. The determiner detects uncorrected noise from the peak value and the bottom value of the output signal from the subtractor, and sets the phase-shift amount such that the uncorrected noise is reduced to a minimum.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application claims priority under 35 U.S.C. § 119 toJapanese Patent Application No. 2019-181002, filed on Sep. 30, 2019. Thecontents of which are incorporated herein by reference in theirentirety.

BACKGROUND OF THE INVENTION 1. Field of the Invention

The present invention relates to a signal correction device, an imagereading device, an image processing apparatus, a signal correctionmethod, and a computer program product.

2. Description of the Related Art

In recent years, various image reading devices have been requested toimprove in image quality and processing speed. Typically, along with anincrease in image reading rate, a clock signal to drive an image sensoror an image processing IC increases in frequency, increasing unintendedelectromagnetic radiation. In view of this, a spread spectrum clockgenerator (SSCG) is known, which modulates the frequency of a clocksignal to reduce unintended radiation intensity.

Applying SSCG to an image reading device, however, may cause a sideeffect that the image varies in level in synchronization with amodulation period and the image appears as moire or a tripe pattern. Amethod of preventing the image from deteriorating in quality due to theside effect is available, which includes adding, to a digital imagesignal, a correction signal generated from digital data serving as amodulation profile of a clock signal, to thereby remove noise,superimposed and synchronized with a modulation period, from the digitalimage signal.

For example, a technique of automatically and appropriately adjustingthe polarity and amplitude of a correction signal for appropriatelycorrecting SSCG noise is disclosed (in Japanese Patent No. 5444795, forinstance).

Such a conventional technique, however, adjusts the correction signal inpolarity and amplitude but not in phase. Because of this, a delay due tothe characteristics of a signal processing IC may change because oftemperature or over time, which may cause a variation in phase shiftbetween noise superimposed on a signal to correct and the correctionsignal. In this case, initially correctable noise may become no longercorrected, which may cause deterioration of the image quality. Further,the phase cannot be easily re-adjusted, therefore, the user may beforced to use the image reading device with the deteriorated imagequality.

SUMMARY OF THE INVENTION

According to one aspect of the present invention, a signal correctiondevice includes a correction signal generator configured to generate acorrection signal serving to remove noise superimposed on an inputsignal; a phase adjuster configured to shift a phase of the correctionsignal generated by the correction signal generator; a subtractorconfigured to generate an output signal for output by subtracting thecorrection signal from the phase adjuster from the input signal; a peakand bottom detector configured to detect a peak value and a bottom valueof the output signal; and a determiner configured to determine an amountof phase shift of the phase adjuster from the peak value and the bottomvalue of the output signal detected by the peak and bottom detector. Thedeterminer detects uncorrected noise from the peak value and the bottomvalue of the output signal from the subtractor, and sets the amount ofphase shift such that the uncorrected noise is reduced to a minimum.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic cross-sectional view illustrating a structure ofan image forming apparatus according to a first embodiment;

FIG. 2 is a schematic diagram illustrating a structure of an imagereading device;

FIG. 3 is a block diagram illustrating a signal processing circuitincluded in a sensor board;

FIG. 4 is a block diagram illustrating a functional configuration of asignal correction device;

FIG. 5 is a diagram illustrating an example of uncorrected noise in arelationship in phase between noise superimposed on an input signal anda correction signal;

FIG. 6 is a diagram illustrating an example of a result of a correctionwhen delay is adjusted in conformity with uncorrected noise;

FIG. 7 is a diagram illustrating an example of a phase adjustment by adelay unit;

FIG. 8 is a block diagram illustrating a functional configuration of adelay determiner;

FIGS. 9A and 9B are diagrams illustrating an example of determining tochange the delay;

FIGS. 10A and 10B are diagrams illustrating an example of determiningnot to change the delay;

FIG. 11 is a flowchart illustrating phase adjustment of a correctionsignal by a signal correction device;

FIG. 12 is a diagram illustrating an influence of a correction by thesignal correction device;

FIGS. 13A and 13B are diagrams illustrating variations in delay setting;

FIG. 14 is a diagram illustrating an example of changing the delay byone step from a phase shift corresponding to half of a step width;

FIG. 15 is a block diagram illustrating a functional configuration of asignal correction device according to a second embodiment;

FIG. 16 is a flowchart illustrating phase adjustment of a correctionsignal by the signal correction device;

FIG. 17 is a diagram illustrating an influence of disturbance noisecaused by a small amount of change in uncorrected noise;

FIG. 18 is a diagram illustrating a decrease in influence of disturbancenoise by amplification of a correction signal; and

FIG. 19 is a flowchart illustrating phase adjustment of a correctionsignal by a signal correction device according to a third embodiment.

The accompanying drawings are intended to depict exemplary embodimentsof the present invention and should not be interpreted to limit thescope thereof. Identical or similar reference numerals designateidentical or similar components throughout the various drawings.

DESCRIPTION OF THE EMBODIMENTS

The terminology used herein is for the purpose of describing particularembodiments only and is not intended to be limiting of the presentinvention.

As used herein, the singular forms “a”, “an” and “the” are intended toinclude the plural forms as well, unless the context clearly indicatesotherwise.

In describing preferred embodiments illustrated in the drawings,specific terminology may be employed for the sake of clarity. However,the disclosure of this patent specification is not intended to belimited to the specific terminology so selected, and it is to beunderstood that each specific element includes all technical equivalentsthat have the same function, operate in a similar manner, and achieve asimilar result.

An object of an embodiment is to provide a signal correction devicewhich can accurately correct noise in a signal to correct, irrespectiveof a change in phase shift between noise superimposed on the signal anda correction signal due to the influence of temperature or over time.

An embodiment of the present invention will be described in detail belowwith reference to the accompanying drawings.

With reference to the accompanying drawings, embodiments of a signalcorrection device, an image reading device, an image processingapparatus, a signal correction method, and a computer program productwill be described in detail below.

First Embodiment

FIG. 1 is a schematic cross-sectional view illustrating a structure ofan image forming apparatus 1 according to a first embodiment.

The image forming apparatus 1 functions as an image processing apparatusand is, for example, a digital multi-function peripheral including acopy function, a printer function, a scanner function, and a facsimilefunction. The image forming apparatus 1 includes an image reading deviceor a scanner 2. With a switch key of an application on an operation unit(not illustrated in FIG. 1), the image forming apparatus 1 can beselectively switched among the copy function, the printer function, thescanner function, and the facsimile function when appropriate. The imageforming apparatus 1 is placed in a copy mode while the copy function isselected, is placed in a scanner mode while the scanner function isselected, and is placed in a facsimile function while the facsimile modeis selected.

The image forming process of the image forming apparatus 1 in the copymode will be briefly described with reference to FIG. 1, by way ofexample. In the copy mode, an automatic document feeder 3 sequentiallyfeeds a bundle of documents to the image reading device 2 and the imagereading device 2 reads image information therefrom. A writing unit 4converts the read image information into optical information via animage processor (not illustrated in FIG. 1). A printer unit 5 serves asan image forming unit and includes a photosensitive drum 6. Thephotosensitive drum 6 is electrically charged uniformly by a charger(not illustrated in FIG. 1) and is exposed on the basis of the opticalinformation from the writing unit 4, to form an electrostatic latentimage thereon. The electrostatic latent image on the photosensitive drum6 is developed into a toner image by a developing device 7. The tonerimage is then transferred onto a sheet of paper fed by a conveyance belt8 from a paper feeding cassette 9. The toner image transferred onto thesheet of paper is fixed by a fixing device 10 and is ejected to anejected paper tray 11.

The image reading device 2 reads an image from the document with acharge coupled device (CCD: linear image sensor) 25 (refer to FIG. 2),and converts an analog image signal into a digital image signal.

FIG. 2 is a schematic diagram illustrating a structure of the imagereading device 2. The image reading device 2 includes a contact glass12, a first carriage 13, a second carriage 14, a lens unit 15, a sensorboard 16, a signal cable 17, an image processor 18, and a whitereference board 19.

A document 20 is set on the contact glass 12. The first carriage 13includes a xenon lamp 21 for exposing the document and a firstreflective mirror 22. The second carriage 14 includes a secondreflective mirror 23 and a third reflective mirror 24. For scanning, astepping motor (not illustrated in FIG. 2) drives the first carriage 13and the second carriage 14 to move in a sub-scanning direction A. Theimage of the document is irradiated by the xenon lamp 21 and istransmitted to the lens unit 15 via the first reflective mirror 22, thesecond reflective mirror 23, and the third reflective mirror 24. Thelens unit 15 forms the image of the fed document on the CCD (CCD linearimage sensor) 25.

The image reading device 2 of the first embodiment employs adifferential mirror system in which the first carriage 13 movesrightward under the document at a speed V and the second carriage 14moves at a speed V/2 to scan the document while maintaining the opticalpath length constant. However, the image reading device 2 is not limitedthereto. For example, the image reading device 2 may employ anintegrated scanning optical unit incorporating a lens, an illuminator, amirror, and an image sensor in a united manner, and the entire unitscans to read a document.

The sensor board (signal processing circuit) 16 generates an analogimage signal from the image of the document read by the CCD 25 andconverts the analog signal into a digital signal. The sensor board 16includes a signal processing circuit including the CCD 25.

FIG. 3 is a block diagram illustrating the signal processing circuitincluded in the sensor board 16. The sensor board 16 includes anoscillator 26, a spread spectrum clock generator (SSCG) circuit 27, atiming generator 28, a CCD 25, an emitter follower (EF) circuit 29, anAC coupling capacitor 30, an AFE (signal processing IC) 31, and a signalcorrection device 32.

The signal processing circuit is not limited to the one illustrated inFIG. 3. For example, the AFE (signal processing IC) 31 may include theSSCG circuit 27, the timing generator 28, and the signal correctiondevice 32.

The oscillator 26 outputs a clock signal serving as a reference signaland includes a crystal oscillator. To take a countermeasure againstdeterioration in properties due to electromagnetic interference (EMI),the SSCG circuit 27 modulates the frequency or spreads the spectrum of aclock signal output by the oscillator 26. Specifically, the SSCG circuit27 integrally flattens the EMI spectrum through the frequency modulationof the operation clock within a minute range in a slow cycle.

The timing generator 28 represents an integrated circuit (IC) includinga PLL circuit 40, a timing generation circuit 41, and a register unit 42that are integrated, and generates, from the frequency-modulated clocksignal, drive clocks for drive signals serving to drive the CCD 25, theAFE 31, and the signal correction device 32.

The PLL circuit 40 multiplies the frequency-modulated clock signal to adesired frequency. The timing generation circuit 41 divides thefrequency of the multiplied clock signal to generate a CCD drive signaland generate drive clocks for a CCD drive signal to drive the CCD 25, asignal processing IC drive signal to drive the AFE 31, and a drivesignal to drive the signal correction device 32. The CCD drive signal isoutput to the CCD 25, the signal processing IC drive signal is output tothe AFE 31, and the drive signal is output to the signal correctiondevice 32. Each drive clock is adjustable in pulse width and phase in aunit of multiplied clock in the PLL circuit 40.

The register unit 42 stores an operation setting for the timinggenerator 28 and various conditions. The settings of the register unit42 are made by an external CPU via a CPU I/F 43 at the time of power-on.The CPU is mainly incorporated in the image processor 18.

The CCD 25 is a photoelectric conversion element that reads the lightreflected by the document and converts the light into an electricsignal, i.e., analog image signal. An emitter-follower circuit 29performs impedance matching between the CCD 25 and the AC couplingcapacitor 30. The AC coupling capacitor 30 lowers the offset voltagesuch that the voltage of the analog image signal output from the CCD 25falls within the range of rated input voltages of the AFE 31.

The AFE 31 is a signal processing IC including a clamp circuit 44, asample hold (S/H) circuit 45, a programmable gain amplifier (PGA) 46, anAD converter (ADC) 47, a register unit 48, and a black offset correctioncircuit (not illustrated in FIG. 3) in an integrated manner. One ofimportant functions of the AFE 31 is to convert the analog image signalinput to the AFE 31 to a digital image signal.

The clamp circuit 44 maintains the level of the input analog imagesignal at a desired constant voltage level. The sample hold circuit 45samples the analog image signal using a sample pulse being one of signalprocessing IC drive signals and maintains the signal level, to generatea continuous analog image signal. The programmable gain amplifier 46amplifies the analog image signal at a given amplification factor. TheAD converter 47 converts the analog image signal to a digital imagesignal and outputs the digital image signal to the signal correctiondevice 32.

The register unit 48 stores an operation setting for the AFE 31 andvarious conditions. The setting of the register unit 48 is made by anexternal CPU via a CPU I/F 49 at the time of power-on. The CPU isgenerally incorporated in the image processor 18. The black offsetcorrection circuit sets a black level serving as a reference of imagesignals to a desired output.

The signal correction device 32 receives the digital image signal (inputsignal) from the AFE 31 and removes noise superimposed on the digitalimage signal.

The signal correction device 32 is implemented by, for example, acontrol device's, such as a central processing unit (CPU), executing asoftware program stored in a storage device, such as a read only memory(ROM) or a random access memory (RAM).

The computer program that implements the signal correction device 32 ofthe first embodiment is recorded and provided in an installable orexecutable file format on a computer-readable recording medium, such asa CD-ROM, a flexible disk (FD), a CD-R, or a digital versatile disk(DVD).

The computer program that implements the signal correction device 32 ofthe first embodiment may be stored in a computer connected to a networksuch as the Internet, and provided, being downloaded via the network.Alternatively, the computer program that implements the signalcorrection device 32 of the first embodiment may be provided ordistributed via a network, such as the Internet. Alternatively, thecomputer program that implements the signal correction device 32 of thefirst embodiment may be incorporated in advance in a ROM, for example.

The signal correction device 32 may be partially or entirely implementednot by a software program but by hardware circuitry, such as afield-programmable gate array (FPGA) or an application specificintegrated circuit (ASIC).

FIG. 4 is a block diagram illustrating a functional configuration of thesignal correction device 32. As illustrated in FIG. 4, the signalcorrection device 32 includes a correction signal generator 321, asubtractor 322, a peak and bottom detector 323, a delay unit 324 servingas a phase adjuster, and a delay determiner serving as a determiner. Thesignal correction device 32 is, for example, provided for each of threecolors (red, green, and blue) of the CCD (CCD linear image sensor) 25.

The correction signal generator 321 generates a correction signal forremoving superimposed noise from the input signal and outputs thecorrection signal to the delay unit 324.

The delay unit 324 shifts the phase of the correction signal generatedby the correction signal generator 321 for output to the subtractor 322.The subtractor 322 generates an output signal by subtracting thecorrection signal from the delay unit 324 from the input signal, andthen outputs the output signal.

The peak and bottom detector 323 detects a peak value and a bottom valueof the output signal and outputs the peak value and the bottom value asa feedback signal to the delay determiner 325.

The delay determiner 325 determines a delay, i.e., amount of phaseshift, of the delay unit 324 from the peak value and the bottom value ofthe output signal detected by the peak and bottom detector 323.

In the signal correction device 32, the correction signal generator 321receives a reference signal from the oscillator 26, for example, togenerate a correction signal on the basis of the reference signal, thedelay unit 324 shifts the generated correction signal in phase, andinputs the correction signal to the subtractor 322. The subtractor 322of the signal correction device 32 then corrects the noise bysubtracting the correction signal from the input signal and outputs theresultant signal as an output signal.

FIG. 5 is a diagram illustrating an example of uncorrected noise in arelationship in phase between noise superimposed on an input signal anda correction signal. As illustrated in FIG. 5, a phase shift betweennoise superimposed on an input signal and a correction signal causesuncorrected noise remaining in an output signal.

For this reason, the peak and bottom detector 323 of the signalcorrection device 32 detects the peak value and the bottom value of theoutput signal and detects uncorrected noise from the peak value and thebottom value as detected. The delay determiner 325 of the signalcorrection device 32 determines a delay for shifting the phase of thecorrection signal such that the uncorrected noise is reduced to aminimum.

FIG. 6 is a diagram illustrating an example of a result of a correctionwhen adjusting the delay in conformity with uncorrected noise. Asillustrated in FIG. 6, the signal correction device 32 delays, with thedelay unit 324, the correction signal for phase shift in accordance withthe delay determined by the delay determiner 325. FIG. 6 illustratesnoise and a corresponding correction signal in a triangle waveform forthe sake of simple explanation. The noise and the correction signal canbe in another waveform.

A phase adjustment method by the delay unit 324 will be described.

FIG. 7 is a diagram illustrating an exemplary phase adjustment by thedelay unit 324. As illustrated in FIG. 7, the delay unit 324 adjusts thecorrection signal in phase by changing the delay in unit of a step of apre-set width to delay the phase of the correction signal. This makes itpossible to adjust the phase setting while checking the uncorrectednoise when appropriate, which ensures that the phase is set to minimizethe amount of noise. This enables accurate noise correction.

In the case of adjusting a signal in amplitude prior to in phase, theamplitude adjustment may not be appropriate, which may cause therelationship between increase and decrease in the amplitude of thecorrection signal and decrease in the amount of noise to be non-linear,therefore, the amount of variation may not fall within an intended errorrange. In the case of a phase adjustment prior to an amplitudeadjustment, the correction signal is set to an appropriate amplitudesufficient to see a change in the amount of noise due to a change in thephase. Because of this, at the time of phase adjustment, the amount ofnoise after the correction may be increased so that the amount ofvariation may not fall within an intended error range.

In order to solve such a situation, the delay determiner 325 comparesthe amounts of noise before and after the change in the phase setting,thereby reducing the uncorrected noise to a minimum after each phasesetting.

FIG. 8 is a block diagram illustrating a functional configuration of thedelay determiner 325. As illustrated in FIG. 8, the delay determiner 325includes a first storage 3251, a second storage 3252, and a comparator3253. In other words, the delay determiner 325 includes the firststorage 3251 and the second storage 3252 for each of the three colors.

The first storage 3251 stores uncorrected noise after a change of thedelay (first uncorrected noise) to be described below.

The second storage 3252 stores uncorrected noise before the change ofthe delay (second uncorrected noise) to be described below.

The comparator 3253 compares the first uncorrected noise stored in thefirst storage 3251 and the second uncorrected noise stored in the secondstorage 3252 with each other. In other words, the delay determiner 325determines whether to change the amount of phase shift or delay of thecorrection signal for each color.

After comparator 3253 determines that the first uncorrected noise in thefirst storage 3251 is larger, the delay determiner 325 determines tochange the delay. FIGS. 9A and 9B are diagrams illustrating an exampleof determining to change the delay. As illustrated in FIGS. 9A and 9B,the first uncorrected noise stored in the first storage 3251 is largerthan the second uncorrected noise stored in the second storage 3252.

Meanwhile, after comparator 3253 determines that the second uncorrectednoise in the second storage 3252 is larger, the delay determiner 325determines not to change the delay. FIGS. 10A and 10B are diagramsillustrating an example of determining not to change the delay. Asillustrated in FIGS. 10A and 10B, the second uncorrected noise stored inthe second storage 3252 is larger than the first uncorrected noisestored in the first storage 3251.

FIG. 11 is a flowchart illustrating a phase adjustment of a correctionsignal by the signal correction device 32. As illustrated in FIG. 11,after making an initial setting (step S1), the signal correction device32 detects uncorrected noise using the peak and bottom detector 323(step S2) and stores the uncorrected noise as first uncorrected noise inthe first storage 3251 (step S3).

The signal correction device 32 then transfers the first uncorrectednoise from the first storage 3251 to the second storage 3252 and set theuncorrected noise as second uncorrected noise (step S4).

The signal correction device 32 then changes the delay by one step usingthe delay unit 324 (step S5).

The signal correction device 32 detects uncorrected noise using the peakand bottom detector 323 (step S6) and stores the uncorrected noise asfirst uncorrected noise in the first storage 3251 (step S7). In otherwords, the first uncorrected noise refers to uncorrected noise after achange of the delay. The second uncorrected noise refers to uncorrectednoise before a change of the delay.

Using the comparator 3253, the signal correction device 32 then comparesthe first uncorrected noise stored (uncorrected noise after a change ofthe delay) in the first storage 3251 and the second uncorrected noise(uncorrected noise before a change of the delay) stored in the secondstorage 3252 (step S8). In other words, at step S8, the signalcorrection device 32 makes a determination as to whether to attempt tofurther change the delay.

After the comparator 3253 determines that the second uncorrected noisein the second storage 3252 is smaller than or equal to the firstuncorrected noise (the first uncorrected noise the second uncorrectednoise) (NO at step S8), the signal correction device 32 determines notto change the delay.

After determining not to change the delay, the signal correction device32 returns the delay setting to the previous setting (step S9) anddetermines the setting as the final delay setting value using the delaydeterminer 325 (step S10).

Meanwhile, after the comparator 3253 determines that the firstuncorrected noise in the first storage 3251 is smaller (the seconduncorrected noise>the first uncorrected noise) (YES at step S8), thesignal correction device 32 determines to change the delay.

After determining to change the delay, the signal correction device 32returns to step S4, transfers the first uncorrected noise from the firststorage 3251 to the second storage 3252, and changes the delay by onestep using the delay unit 324 (step S5).

The signal correction device 32 then detects uncorrected noise using thepeak and bottom detector 323 (step S6), stores the uncorrected noise asfirst uncorrected noise in the first storage 3251 (step S7), and makes acomparison again using the comparator 3253 (step S8).

As described above, comparing the first uncorrected noise and the seconduncorrected noise before and after the change in the phase setting makesit possible to reduce the uncorrected noise to a minimum after eachphase setting and enables an accurate phase adjustment irrespective ofimproper amplitude adjustment.

FIG. 12 is a diagram illustrating an influence of a correction by thesignal correction device 32. In the image reading device 2 including theSSCG circuit 27, the analog timing generation circuit 41 uses aSSCG-modulated clock signal, therefore, the offset voltage level of animage sensor output waveform varies in synchronization with the SSCGmodulation of the clock signal. This may cause a periodical variationand a difference in level of the image signal, read from an image withuniform density level, in one main scanning line. Along with a variationin the signal level in a very short period due to high-frequency noisesuperimposed on the waveform of the image signal, for example, thesampling point of the image signal varies in synchronization with SSCGmodulation, resulting in sampling a part of the image signal at adifferent signal level due to the noise and leading to the samesituation as above. Through repetition of the variation in a largenumber of lines, as illustrated in the upper drawing of FIG. 12, thedifference in pixel level appears as vertical moire and/or oblique moirein the read image.

Meanwhile, as illustrated in the lower drawing of FIG. 12, the signalcorrection device 32 of the first embodiment is capable of correctingthe image to the one including no apparent oblique moire by, forexample, correcting the difference in level in one line resulting fromSSCG.

As described above, according to the first embodiment, the signalcorrection device 32 detects uncorrected noise from an output signalcorrected by a correction signal to set a delay of the correction signalsuch that the uncorrected noise is reduced to a minimum. Thereby, thesignal correction device 32 can automatically adjust the phase to anappropriate setting according to noise behavior and appropriatelycorrect superimposed noise from a signal to correct irrespective of achange in phase shift between the noise and the correction signal due tothe influence of temperature or over time.

In the first embodiment, the delay unit 324 performs phase adjustment bychanging the delay in unit of a step of a pre-set width so as to delaythe correction signal in phase. However, the phase adjustment is notlimited thereto. As illustrated in FIG. 7, adjusting a large amount ofphase shift by changing the delay in unit of a step (by minimum unit)may results in elongating the amount of time to complete the adjustment.

In the first embodiment, particularly, it is preferable to perform phaseadjustment at the time of power-on of the device or immediately before acertain operation, for the purpose of correcting a change in the phaseof noise due to the influence of temperature or over time.

Specifically, upon power-on of the image reading device 2, the controlboard runs and the elements on the control board starts generating heat.The temperatures of the elements are affected and differ by thesurrounding environment such as a difference in season, a difference inhumidity, and the installed location of the device such as indoor oroutdoor. The temperature differences among the elements may change thestate of phase of noise superimposed on the image signal.

During scanning by the image reading device 2, the elements to drive theCCD 25 and the other elements generate heat. The elements gradually risein temperature during successive scanning and vary in temperature uponeach scanning. As for the automatic document feeder (ADF), particularly,in successive scanning the automatic document feeder scans documentswithout stop, so that the elements are continuously driven, greatlyincreasing in the temperature. Such a temperature change in the elementsmay cause a change in the state of phase of noise superimposed on theimage signal.

To reduce power consumption during no use, the recent image readingdevices 2 mostly transition to an energy-saving mode during anon-operating period. In the energy-saving mode, the image readingdevice 2 stops operations of irrelevant elements for saving power. Theimage reading device 2 generally recovers from the energy saving mode toa standby mode. However, there may a situation that in response to ascan command, for example, the image reading device 2 recovers from theenergy-saving mode to a scanning operation before the temperatures ofthe elements reach the normal temperatures in a stand-by state. In thatcase, the temperature condition of each element may be different fromthat in the stand-by state after the power-on. This may cause a changein the phase state of noise superimposed on an image signal.

As described above, it is preferable for the signal correction device 32of the first embodiment to correct the correction signal at certaintiming, for example, each time the image reading device is powered on,each time the image reading device performs scanning, or each time theimage reading device recovers from the energy-saving mode to thestand-by mode. This makes it possible to correct, in response to achange in the state of phase of noise superimposed on an image signal,the correction signal in accordance with the change, and accuratelycorrect the noise. Further, in response to a change in the state ofphase of noise superimposed on an image signal caused by continuous heatgeneration of the elements, the signal correction device 32 can correctthe correction signal in accordance with the change and accuratelycorrect the noise.

In response to a change in the state of phase of noise superimposed onan image signal caused by a temperature change in the elements due torecovery from the energy-saving mode to the stand-by mode, the signalcorrection device 32 can correct the correction signal in accordancewith the change and accurately correct the noise.

However, correcting the correction signal upon every power-on, everyscanning, or every recovery from the energy-saving mode to the stand-bymode of the image reading device may elongate the length of time takenfor the power-on of the device and the start of operation, loweringusability.

In view of this, at the time of changing the delay setting, the delaymay be shifted in a step width twice as large as or larger than theminimum unit of the setting value (minimum setting value). FIGS. 13A and13B are diagrams illustrating variations in delay setting. Asillustrated in FIG. 13A, for example, in the case of the initial phaseshift having a value of 10, incrementing the delay setting in unit ofone step requires eleven-time repetitions of the process of changing thesetting, acquiring uncorrected noise, and comparison and determination.Meanwhile, as illustrated in FIG. 13B, changing the delay setting inunit of five steps requires three-time repetitions of the series ofprocess, making it possible to significantly shorten the adjustmenttime.

Changing the setting value by a certain step width as described abovemay cause a remaining phase shift corresponding to half of the stepwidth at maximum. FIG. 14 is a diagram illustrating an example ofchanging the delay by one step from a phase shift corresponding to halfof a step width. In the example illustrated in FIG. 14, the uncorrectednoise caused by a one-step shift is approximately equal to theuncorrected noise before the shift and thus the uncorrected noiseremains after the final adjustment. For this reason, it is preferable toset the step width to a maximum setting value or less in the allowablerange of the uncorrected noise caused by the remaining phase shift.

This makes it possible to correct the uncorrected noise in an allowablelevel while reducing the phase adjustment time to a minimum.

Alternatively, repeatedly incrementing and decrementing the delay whilenarrowing the step width makes it possible to find optimum delaysetting. For example, the amount of the final uncorrected noise isdecreased by gradually narrowing the step width in the order of 5, 4, 3,2 and 1 upon changing the delay. For another example, after determiningnot to change the delay, the step width is narrowed from 5 to 4 and thenthe delay is set back by one step, and after determining not to changethe delay again, the step width is narrowed from 4 to 3 and then thedelay is set by one step further.

Such a changing method of the delay may elongate the phase adjustmenttime than that of the method described referring to FIGS. 13 and 14. Itis thus preferable to select the most effective method in considerationof an allowable adjustment time and intended adjustment accuracy.

The input signal to the signal correction device 32 of the firstembodiment may be other than the output signal of the AD converter (ADC)47 as long as the input signal is a digital signal. For example, the AFE31 may include, after the AD converter (ADC) 47, a digital gain applyingunit that amplifies the digital signal to output the digital-gainapplied output signal to the signal correction device 32. This enablesan appropriate correction of a digital input signal.

Alternatively, the input signal to the signal correction device 32 ofthe first embodiment may be an analog signal. In the case of inputtingan analog input signal, for example, the output signal of a programmablegain amplifier (PGA), which amplifies the analog signal, may serve asthe input signal of the signal correction device 32. The input signal tothe signal correction device 32 may be other than the output signal ofthe PGA as long as the input signal is an analog signal. For example,the signal before being amplified by the PGA may serve as the inputsignal. This enables an appropriate correction of the input analogsignal.

Second Embodiment

A second embodiment will be now described.

The second embodiment is different form the first embodiment inadjusting the amplitude after completion of the phase adjustment. Thesecond embodiment will omit the same features as those of the firstembodiment and describe features different from those of the firstembodiment.

After amplitude adjustment of a correction signal with a phase shiftbetween noise superimposed on a digital image signal (input signal)output from the AFE 31 and the correction signal, the relationshipbetween increase and decrease in the amplitude of the correction signaland decrease in the amount of noise becomes non-linear, which may causea minimal amount of uncorrected noise corresponding to the amount ofphase shift. In view of this, the second embodiment adjusts thecorrection signal in amplitude after completion of the phase adjustmentdescribed in the first embodiment referring to FIG. 11.

FIG. 15 is a block diagram illustrating a functional configuration ofthe signal correction device 32 according to the second embodiment. Asillustrated in FIG. 15, the signal correction device 32 includes amultiplier 326 and an amplification and attenuation amount determiner327, in addition to the elements illustrated in FIG. 4.

The multiplier 326 multiplies the correction signal from the delay unit324 for amplitude amplification or attenuation.

The amplification and attenuation amount determiner 327 determines anamount of amplification or attenuation of the multiplier 326.

FIG. 15 depicts an example that the output of the delay unit 324 isinput to the multiplier 326. However, the delay unit 324 and themultiplier 326 may have an inverse positional relationship as long asthe delay determiner 325 and the amplification make their determinationsin the same order.

For example, the amplification and attenuation amount determiner 327 maydetermine the amount of amplification or attenuation after the delaydeterminer 325 determines a delay. Thus, adjusting phase and amplitudein this order enables more accurate noise correction.

FIG. 16 is a flowchart illustrating the process of adjusting the phaseof a correction signal by the signal correction device 32. Asillustrated in FIG. 16, the signal correction device 32 adjusts thecorrection signal in amplitude (step S22) after completing the phaseadjustment described in the first embodiment referring to FIG. 1 (stepS21).

At step S22, after the delay determiner 325 determines a delay, theamplification and attenuation amount determiner 327 determines theamount of amplification or attenuation of the correction signal.

FIG. 17 is a diagram illustrating an influence of disturbance noisecaused by a small amount of change in uncorrected noise. As illustratedin FIG. 17, at the time of phase adjustment, a too small change in theuncorrected noise due to a change of the delay may be hidden bydisturbance, such as electric noise superimposed on an input signal,which may make an appropriate adjustment unfeasible. FIG. 17 illustratesan example that the width of disturbance noise is larger than the amountof change in uncorrected noise. In this case, it may be not possible toappropriately determine whether the change in uncorrected noise beforeand after the change of the delay is caused by the change of the delayor the disturbance noise, which may result in an erroneous correction oran excessive correction.

FIG. 18 is a diagram illustrating a decrease in influence of disturbancenoise by amplification of a correction signal. As illustrated in FIG.18, when changing the delay, the signal correction device 32 of thesecond embodiment amplifies or attenuates the amplitude of thecorrection signal to a certain magnitude using the multiplier 326 suchthat the change in the uncorrected noise caused by the change of thedelay is not hidden by the disturbance.

According to the second embodiment, as described above, setting theamplitude of the correction signal to a certain magnitude at the time ofphase adjustment prevents the change in the amount of noise caused bythe phase adjustment from being hidden by random noise. Thereby, thesignal correction device 32 reduces the influence of uncorrected noisecaused by a phase shift. Irrespective of a disturbance superimposed onan input signal, thus, the signal correction device 32 can detect achange in uncorrected noise caused by a change of the delay andappropriately make a phase adjustment, to be able to accurately correctnoise.

Third Embodiment

A third embodiment will be described.

The third embodiment is different from the first embodiment and thesecond embodiment in that the signal correction device 32 includes thedelay unit 324 in common for all the colors (red, green, and blue) ofthe CCD (CCD linear image sensor) 25, and determines not to change thedelay for the other colors after determining not to change the delay forone of the colors. The third embodiment will omit describing the samefeatures as those of the first embodiment and the second embodiment anddescribe different features from those of the first embodiment and thesecond embodiment.

Typical image reading devices include image sensors of three colors ofR, G, and B to separately generate three-color images and perform imageprocessing to the images of the three colors at a subsequent stage. Forthis reason, image reading devices mostly include signal processingunits, such as a PGA 46 and an ADC 47, for the three colors. The sameapplies to the signal correction device 32, however, the signalcorrection device 32 including signal processing units for the threecolors is increased in circuit scale, increasing the cost.

In view of this, the signal correction device 32 can include part of theprocessing units in common for the three colors, making it possible toavoid increase in circuit scale and cost. For example, the delay unit324 of the signal correction device 32 can be used in common for thethree colors to avoid a cost increase.

In the case of using the delay unit 324 in common for the three colorsand changing the delay for the three colors with different phase shifts,for example, a phenomenon that the uncorrected noise decreases in acertain color but increase in another color may occur. In this case,determining a delay for each color makes it impossible to find a delaysetting that reduces uncorrected noise for all the colors, which causesthe correction process to become an infinite loop.

FIG. 19 is a flowchart illustrating a phase adjustment of a correctionsignal by the signal correction device 32 according to the thirdembodiment. As illustrated in FIG. 19, the signal correction device 32of the third embodiment includes the delay unit 324 in common for thethree colors (red, green, and blue) of the CCD (CCD linear image sensor)25, and the peak and bottom detector 323 detects uncorrected noise ineach color (steps S12 and S16).

The comparator 3253 of the signal correction device 32 compares firstuncorrected noise (uncorrected noise after a change of the delay) storedin the first storage 3251 and second uncorrected noise (uncorrectednoise before the change of the delay) stored in the second storage 3252(step S18). After determining not to change the delay for one of thecolors, the comparator 3253 of the signal correction device 32determines not to change the delay for the other colors (NO at stepS18).

As described above, according to the third embodiment, the signalcorrection device 32 can separately determine to change or not to changethe delay for the colors of the CCD (CCD linear image sensor) 25, whichcan prevent the correction process from fall into an infinite loop.

In the example illustrated in FIG. 19, the CCDs of three colors of red,green and blue are described. In the case of using image sensors thatgenerate images of different colors, the delay determination method ofthe embodiment may be applied to each corresponding color.

The above-described embodiments have described the example that theimage processing device of the present invention is applied to amulti-function peripheral including at least two of the copy function,the printer function, the scanner function, and the facsimile function.The image processing device is applicable to any image formingapparatus, such as a copier, a printer, a scanner, or a facsimilemachine.

The present invention can advantageously correct noise superimposed on asignal to correct appropriately, irrespective of a change in phase shiftbetween noise and a correction signal due to the influence oftemperature or over time.

The above-described embodiments are illustrative and do not limit thepresent invention. Thus, numerous additional modifications andvariations are possible in light of the above teachings. For example, atleast one element of different illustrative and exemplary embodimentsherein may be combined with each other or substituted for each otherwithin the scope of this disclosure and appended claims. Further,features of components of the embodiments, such as the number, theposition, and the shape are not limited the embodiments and thus may bepreferably set. It is therefore to be understood that within the scopeof the appended claims, the disclosure of the present invention may bepracticed otherwise than as specifically described herein.

The method steps, processes, or operations described herein are not tobe construed as necessarily requiring their performance in theparticular order discussed or illustrated, unless specificallyidentified as an order of performance or clearly identified through thecontext. It is also to be understood that additional or alternativesteps may be employed.

Further, any of the above-described apparatus, devices or units can beimplemented as a hardware apparatus, such as a special-purpose circuitor device, or as a hardware/software combination, such as a processorexecuting a software program.

Further, as described above, any one of the above-described and othermethods of the present invention may be embodied in the form of acomputer program stored in any kind of storage medium. Examples ofstorage mediums include, but are not limited to, flexible disk, harddisk, optical discs, magneto-optical discs, magnetic tapes, nonvolatilememory, semiconductor memory, read-only-memory (ROM), etc.

Alternatively, any one of the above-described and other methods of thepresent invention may be implemented by an application specificintegrated circuit (ASIC), a digital signal processor (DSP) or a fieldprogrammable gate array (FPGA), prepared by interconnecting anappropriate network of conventional component circuits or by acombination thereof with one or more conventional general purposemicroprocessors or signal processors programmed accordingly.

Each of the functions of the described embodiments may be implemented byone or more processing circuits or circuitry. Processing circuitryincludes a programmed processor, as a processor includes circuitry. Aprocessing circuit also includes devices such as an application specificintegrated circuit (ASIC), digital signal processor (DSP), fieldprogrammable gate array (FPGA) and conventional circuit componentsarranged to perform the recited functions.

What is claimed is:
 1. A signal correction device comprising: acorrection signal generator configured to generate a correction signalserving to remove noise superimposed on an input signal; a phaseadjuster configured to shift a phase of the correction signal generatedby the correction signal generator; a subtractor configured to generatean output signal for output by subtracting the correction signal fromthe phase adjuster from the input signal; a peak and bottom detectorconfigured to detect a peak value and a bottom value of the outputsignal; and a determiner configured to determine an amount of phaseshift of the phase adjuster from the peak value and the bottom value ofthe output signal detected by the peak and bottom detector, wherein thedeterminer detects uncorrected noise from the peak value and the bottomvalue of the output signal output from the subtractor, and sets theamount of phase shift such that the uncorrected noise is reduced to aminimum, and wherein the determiner comprises: a first storage thatstores first uncorrected noise detected from the output signal correctedby the correction signal before the change of the amount of phase shift;a second storage configured to store second uncorrected noise detectedfrom the output signal corrected by the correction signal after thechange of the amount of phase shift; and a comparator configured tocompare the first uncorrected noise stored in the first storage and thesecond uncorrected noise stored in the second storage, wherein thecomparator determines whether to change the amount of phase shift on thebasis of a result of the comparison.
 2. The signal correction deviceaccording to claim 1, wherein the phase adjuster changes the amount ofphase shift in unit of a step of a preset width such that the phase ofthe correction signal delays.
 3. The signal correction device accordingto claim 2, wherein the preset step width of the phase adjuster is setto twice as large as a minimum setting value of the amount of phaseshift and equal to or less than a maximum setting value in an allowablerange of uncorrected noise caused by a remaining phase shift.
 4. Thesignal correction device according to claim 1, further comprising: amultiplier configured to multiply an amplitude of the correction signalfor amplification or attenuation; an amplification and attenuationamount determiner configured to determine an amount of amplification orattenuation of the multiplier, wherein the amplification and attenuationamount determiner determines the amount of amplification or attenuationafter the determiner determines the amount of phase shift.
 5. The signalcorrection device according to claim 4, wherein the multiplier amplifiesthe amplitude of the correction signal for detection of the uncorrectednoise such that a variation in the uncorrected noise due to the changeof the amount of phase shift is not hidden by disturbance.
 6. The signalcorrection device according to claim 1, wherein the input signal is adigital signal.
 7. The signal correction device according to claim 1,wherein the input signal is an analog signal.
 8. An image reading devicecomprising: an image sensor on which light reflected by a document isincident; and the signal correction device according to claim 1 thatreceives an input signal from the image sensor.
 9. The image readingdevice according to claim 8, wherein the image sensor comprises, foreach color of light to receive, a plurality of pixels one-dimensionallyarrayed, the signal correction device comprises the determiner for eachcolor of the light, and comprises the phase adjuster in common for allthe colors of the light, and the determiner determines not to change theamount of phase shift for all the colors after determining not to changethe amount of phase shift for any of the colors.
 10. The image readingdevice according to claim 8, wherein the image sensor comprises, foreach color of light to receive, a plurality of pixels one-dimensionallyarrayed, and the signal correction device comprises the determiner andthe phase adjuster for each color of the light, and the determinerincludes the first storage and the second storage for each color anddetermines for each color whether to change the amount of phase shift ofthe correction signal.
 11. The image reading device according to claim8, wherein the signal correction device corrects the correction signalin response to every power-on of the image reading device.
 12. The imagereading device according to claim 8, wherein the signal correctiondevice corrects the correction signal in response to every scanningoperation of the image reading device.
 13. The image reading deviceaccording to claim 8, wherein the signal correction device corrects thecorrection signal each time the image reading device recovers from anenergy-saving mode to a stand-by mode.
 14. An image processing apparatuscomprising: the image reading device according to claim 8; and an imageforming unit.
 15. A signal correction method to be executed by a signalcorrection device, the method comprising: generating a correction signalserving to remove noise superimposed on an input signal; shifting aphase of the generated correction signal; generating an output signalfor output by subtracting the correction signal from the input signal;detecting a peak value and a bottom value of the output signal; anddetermining an amount of phase shift from the detected peak value andbottom value of the output signal, wherein the determining comprisesdetecting uncorrected noise from the peak value and the bottom value ofthe output signal, and setting the amount of phase shift of thecorrection signal such that the uncorrected noise is reduced to aminimum, and the determining comprises: storing first uncorrected noisedetected from the output signal corrected by the correction signalbefore the change of the amount of phase shift in a first storage;storing second uncorrected noise detected from the output signalcorrected by the correction signal after the change of the amount ofphase shift in a second storage; and comparing the first uncorrectednoise stored in the first storage and the second uncorrected noisestored in the second storage using a comparator, wherein the comparatordetermines whether to change the amount of phase shift on the basis of aresult of the comparison.
 16. A computer program product comprising anon-transitory computer readable medium including programmedinstructions, wherein the instructions, when are executed by a computermounted on a signal correction device connectable to a server via anetwork, cause the computer to execute: generating a correction signalserving to remove noise superimposed on an input signal; shifting aphase of the generated correction signal; generating an output signalfor output by subtracting the correction signal from the input signal;detecting a peak value and a bottom value of the output signal; anddetermining an amount of phase shift from the detected peak value andbottom value of the output signal, wherein the determining comprisesdetecting uncorrected noise from the peak value and the bottom value ofthe output signal, and setting the phase shift amount of the correctionsignal such that the uncorrected noise is reduced to a minimum, and thedetermining comprises: storing first uncorrected noise detected from theoutput signal corrected by the correction signal before the change ofthe amount of phase shift in a first storage; storing second uncorrectednoise detected from the output signal corrected by the correction signalafter the change of the amount of phase shift in a second storage; andcomparing the first uncorrected noise stored in the first storage andthe second uncorrected noise stored in the second storage using acomparator, wherein the comparator determines whether to change theamount of phase shift on the basis of a result of the comparison.